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Is the vhdl case statement the same as the switch statement?


Asked by Maxine Hinton on Dec 12, 2021 FAQ



The VHDL case statement performs the same function as the switch statement in the C programming language. The code snippet below shows the general syntax for the case statement in VHDL. 1
Additionally,
The VHDL Case Statement works exactly the way that a switch statement in C works. Given an input, the statement looks at each possible condition to find one that the input signal satisfies.
Also, However, the “if” statement is more general than a “when/else”, because VHDL allows us to perform multiple assignments in each “then” branch of an “if” statement. The following code illustrates an “if” statement with two assignments in each “then” branch.
In fact,
Given an input, the statement looks at each possible condition to find one that the input signal satisfies. They are useful to check one input signal against many combinations. Just like in C, the VHDL designer should always specify a default condition provided that none of the case statements are chosen.
One may also ask,
This is done via the "when others =>" statement. See the code below for an example of this. One annoyance with case statements is that VHDL does not allow the use of less than or greater than relational operators in the "when" condition. Only values that are equal to the signal in the case test can be used.